加密硬件与嵌入系统 - CHES 2006/会议录 Cryptographic hardware and embedded systems：CHES 2006

Side Channels I

Template Attacks in Principal Subspaces

Templates vs. Stochastic Methods

Towards Security Limits in Side-Channel Attacks

Low Resources

HIGHT: A New Block Cipher Suitable for Low-Resource Device

Invited Talk I

Integer Factoring Utilizing PC Cluster

Hardware Attacks and Countermeasures I

Optically Enhanced Position-Locked Power Analysis

Pinpointing the Side-Channel Leakage of Masked AES Hardware Implementations

A Generalized Method of Differential Fault Attack Against AES Cryptosystem

Special Purpose Hardware

Breaking Ciphers with COPACOBANA A Cost-Optimized Parallel Code Breaker.

Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware

Efficient Algorithms for Embedded Processors

Implementing Cryptographic Pairings on Smartcards SPA-Resistant Scalar Multiplication on Hyperelliptic Curve Cryptosystems Combining Divisor Decomposition Technique and Joint Regular Form

Fast Generation of Prime Numbers on Portable Devices: An Update...

Side Channels II

A Proposition for Correlation Power Analysis Enhancement

High-Resolution Side-Channel Attack Using Phase-Based Waveform Matching

Cache-Collision Timing Attacks Auainst AES

Provably Secure S-Box Implementation Based on Fourier Transform ...

Invited Talk II

The Outer Limits of RFID Security

Hardware Attacks and Countermeasures

Efficient Hardware

Trusted Commputing

Side Channels

Hardware Attacks and Countermeasures

Invited Talk

Efficient Hardware

Author Index