80×86IBM PC及兼容计算机汇编语言设计与接口技术（第4版影印版）

PREFACE TO VOLUMES I AND II

CHAPTER 0:INTRODUCTION TO COMPUTING

SECTION 0.1:NUMBERING AND CODING SYSTEMS

Decimal and binary number systems

Converting from decimal to binary

Converting from binary to decimal

Hexadecimal system

Converting between binary and hex

Converting from decimal to hex

Converting from hex to decimal

Counting in base 10,2,and 16

Addition of binary and hex numbers

2's complement

Addition and subtraction of hex numbers

Additon of hex numbers

Subtraction of hex numbers

ASCII code

SECTION 0.2:INSIDE THE COMPUTER

Some important terminology

Internal organization of computers

More about the data bus

More about the address bus

CPU and its relation to RAM and ROM

Inside CPUs

Internal working of computers

SECTION 0.3:BRIEF HISTORY OF THE CPU

CISC vs.RISC

CHAPTER 1:THE 80x86 MICROPROCESSOR

SECTION 1.1:BRIEF HISTORY OF THE 80x86 FAMILY

Evolution from 8080/8085 to 8086

Evolution from 8086 to 8088

Success of the 8088

Other microprocessors:the 80286,80386,and 80486

SECTION 1.2:INSIDE THE 8088/8086

Pipelining

Registers

SECTION 1.3:INTRODUCTION TO ASSEMBLY PROGRAMMING

Assembly language programming

MOV instruction

ADD instruction

SECTION 1.4:INTRODUCTION TO PROGRAM SEGMENTS

Origin and definition of the segment

Logical address and physical address

Code segment

Logical address vs.physical address in the code segment

Data Segment

Logical address and physical address in the data segment

Little endian convention

Extra segment(ES)

Memory map of the IBM PC

More about RAM

Video RAM

More about ROM

Function of BIOS ROM

SECTION 1.5:MORE ABOUT SEGMENTS IN THE 80x86

What is a stack,and why is it needed?

How stacks are accessed

Pushing onto the stack

Popping the stack

Logical address vs.physical address for the stack

A few more words about segments in the 80x86

Overlapping

Flag register

Bits of the flag register

flag register and ADD instruction

Use of the zero flag for looping

SECTION 1.6:80x86 ADDRESSING MODES

Register addressing mode

Immediate addressing mode

Direct addressing mode

Register indirect addressing mode

Based relative addressing mode

Indexed relative addressing mode

Based indexed addressing mode

Segment overides

CHAPTER 2:ASSEMBLY LANGUAGE PROGRAMMING

SECTION 2.1:DIRECTIVES AND A SAMPLE PROGRAM

Segments of a program

Stack segment definition

Data segment definition

Code segment definition

SECTION 2.2:ASSEMBLE,LINK,AND RUN A PROGRAM

.asm and .obj files

.lst file

PAGE and TITLE directives

.crf file

LINKing the program

.map file

SECTION 2.3:MORS SAMPLE PROGRAMS

Analysis of Program 2-1

Various approaches to Program 2-1

Analysis of Program 2-2

Analysis of Program 2-3

Stack segment definition revisited

SECTION 2.4:CONTROL TRANSFER INSTRUCTIONS

FAR and NEAR

Conditional jumps

Short jumps

Unconditional jumps

CALL statements

Assembly language subroutines

Rules for names in Assembly language

SECTION 2.5:DATA TYPES AND DATA DEFINITION

80x86 data types

Assembler data directives

ORG(origin)

DB(define byte)

DUP(duplicate)

DW(define word)

EQU(equate)

DD(define doubleword)

DQ(define quadword)

DT(define ten bytes)

SECTION 2.6:SIMPLIFIED SEGMENT DEFINITION

Memory model

Segment definition

SECTION 2.7:EXE VS.COM FILES

Why COM files?

Converting from EXE to COM

CHAPTER 3:ARITHMETIC AND LOGIC INSTRUCTIONS AND PROGRAMS

SECTION 3.1:UNSIGNED ADDITION AND SUBTRACTION

Addition of unsigned numbers

CASE 1:Addition of individual byte and word data

Analysis of Program 3-1a

CASE 2:Addition of multiword numbers

Analysis of Program

Subtraction of unsigned numbers

SBB(subtract with borrow)

SECTION 3.2:UNSIGNED MULTIPLCATION AND DIVISION

Multiplication of unsigned numbers

Division of unsigned numbers

SECTION 3.3:LOGIC INSTRUCTIONS AND SAMPLE PROGRAMS

AND

OR

XOR

SHIFT

COMPARE of unsigned numbers

IBM BIOS method of converting from lowercase to uppercase

BIOS examples of logic instructions

SECTION 3.4 BCD AND ASCII OPERANDS AND INSTRUCTIONS

BCD number system

Unpacked BCD

Packed BCD

ASCII numbers

ASCII to BCD conversion

ASCII to unpacked BCD conversion

ASCII to packed BCD conversion

Packed BCD to ASCII conversion

BCD addition and subtraction

BCD addition and correction

DAA

Summary of DAA action

BCD subtraction and correction

Summary of DAS action

ASCII addition and subtraction

Unpacked BCD multiplication and division

AAM

AAD

SECTION 3.5:ROTATE INSTRUCTIONS

Rotating the bits of an operand right and left

ROR rotate right

ROL rotate left

RCR rotate right through carry

RCL rotate left throuht carry

SECTION 3.6:BITWISE OPERATION IN THE C LANGUAGE

Bitwise operators in C

Bitwise shift operators in C

Packed BCD-to-ASCII conversion in C

Testing bits in C

CHAPTER 4:BIOS AND DOS PROGRAMMING IN ASSEMBLY AND C

SECTION 4.1:BIOS INT 10H PROGRAMMING

Monitor screen in text mode

Clearing the screen using INT 20H function 06H

INT 10H function 02:setting the cursor to a specific location

INT 20H function 03:get current cursor position

Changing the video mode

Attribute byte in monochrome monitors

Attribute byte in CGA text mode

Graphics:pixel resolution and color

INT 10H and pixel programming

Drawing horizontal or vertical lines in graphics mode

Changing the background color

SECTION 4.2:DOS INTERRUPT 21H

INIT 21H option 09:outputting a string to the monitor

INIT 21H option 02:outputting a character to the monitor

INIT 21H option 02:inputting a character,with echo

INIT 21H option 0AH:inputting a string from the keyboard

Inputting more than the buffer size

Use of carriage return and line feed

INIT 21H option 07:keyboard input without echo

Using the LABEL directive to define a string buffer

SECTION 4.3:INT 16H KEYBOARD PROGRAMMING

Checking a key press

Whick key is pressed?

SECTION 4.4:INTERRUPT PROGRAMMING WITH C

Programming BIOS interrupts with C/C++

Programming INT 21H DOS function scalls with C/C++

Accessing segment registers

Accessing the carry flag in int86 and intdos functions

Mixing C with Assembly and checking ZF

C function kbhit vs.INT 16H keyboard input

CHAPTER 5:MACROS AND THE MOUSE

SECTION 5.1:WHAT IS A MACRO AND HOW IS IT USED?

MACRO definition

Comments in a macro

Analysis of Program 5-1

LOCAL firective and its use in macros

INCLUDE directive

SECTION 5.2:MOUSE PROGRAMMING WITH INT 33H

INT

Detecting the presence of a mouse

Some mouse terminology

Displaying and hiding the mouse cursor

Video resolution vs.mouse resolution in text mode

Video resolution vs.mouse resolution in graphics mode

Getting the current mouse cursor position(AX=03)

Setting the mouse pointer position(AX=04)

Getting mouse button press information(AX=05)

Monitoring and displaying the button press count program

Getting mouse button release information(AX=06)

Setting horizontal boundary for mouse pointer(AX=07)

Setting vertical boundary for mouse pointer(AX=08)

Setting an exclusion area for the mouse pointer(AX=10)

Getting mouse driver information(version)(AX=24H)

CHAPTER 6:SIGNED NUMBERS,STRINGS,AND TABLES

SECTION 6.1:SIGNED NUMBER ARITHMETIC OPERATIONS

Concept of signed numbers in computers

Signed byte operands

Positive numbers

Negative numbers

Word-sized signed numbers

Overflow problem in signed number operations

When the overflow flag is set in 8-bit operations

Overflow flag in 16-bit operations

Avoiding erroneous results in signed number operations

IDIV(Signed number division)

IMUL(Signed number multiplication)

Arithmetic shift

SAR(shift arithmetic right)

SAL(shift arithmetic left)and SHL(shift left)

Signed number comparison

SECTION 6.2:STRING AND TABLE OPERATIONS

Use of SI and DI,DS and ESin string instructions

Byte and Word operands in string instructions

DF,the direction flag

REP prefix

STOS and LODS instructions

Testing memory using STOSB and LODSB

The REPZ and REPNZ prefixes

SCAS(scan string)

Replacing the Scanned character

XLAT instruction and look-up tables

Code conversion using XLAT

CHAPTER 7:MODULES;MODULAR AND C PROGRAMMING

SECTION 7.1:WRITING AND LINKING MODULES

Why modules?

Writing modules

EXTRN directive

PUBLIC directive

END directive in modules

Linking modules together inot one executable unit

SEGMENT directive

Complete stack segment definition

Complete data and code segment definitions

Analysis of Program 7-2 link map

Modular programming and the new segment definition

SECTION 7.2:SOME VERY USEFUL MODULES

Binary(hex)-to-ASCII conversion

ASCII(decimal)-to-binary(hex)conversion

Binary-to-ASCII module

ASCII-to-binary module

Calling module

SECTION 7.3:PASSING PARAMETERS AMONG MODULES

Passing parameters via registers

Passing parameters via memory

Passing parameters via the stack

SECTION 7.4:COMBINING ASSEMBLY LANGUAGE AND C

Why C?

Inserting 80x86 assembly code into C programs

C programs that call Assembly procedures

C calling convention

How parameters are returned to C

New assemblers and linking with C

Passing array addresses form C to the stack

Linking assembly language routines with C

CHAPTER 8:32-BIT PROGRAMMING FOR 386 AND 486 MACHINES

SECTION 8.1:80386/80486 MACHINES IN REAL MODE

General registers are pointers in 386/486

386/486 maximum memory range in real mode:1M

Accessing 32-bit registers with commonly used assemblers

Little endian revisited

SECTION 8.2:SOME SIMPLE 386/486 PROGRAMS

Adding 16-bit words using 32-bit registers

Adding multiword data in 386/486 machines

Multiplying a 32-bit operand by a 16-bit operand

32-bit by 16-bit multiplication using 8086/286 registers

SECTION 8.3:80x86 PERFORMANCE COMPARISON

Running an 8086 program across the 80x86 family

CHAPTER 9:8088,80286 MICROPROCESSORS AND ISA BUS

SECTION 9.1:8088 MICROPROCESSOR

Microprocessor buses

Data bus in 8088

Address bus in 8088

8088 control bus

Bus timing of 8088

Ohter 8088 pins

SECTION 9.2:8284 AND 8288 SUPPORTING CHIPS

8288 bus controller

Input signals

Output signals

8284 clock generator

Input pins

Output Signals

SECTION 9.3:8-BIT SECTION OF ISA BUS

A bit of bus history

Local bus vs.system bus

Address bus

Data bus

Control bus

One bus,two masters

AEN signal generation

Control of the bus by DMA

Bus boosting

8-bit section of the ISA bus

SECTION 9.4:80286 MICROPROCESSOR

Pin descriptions

SECTION 9.5:16-BIT ISA BUS

Exploring ISA bus signals

Address bus

Data bus

Memory and I/O control signals

Other control signals

ODD and EVEN bytes and BHE

A20 gate and the case of high memory area(HMA)

CHAPTER 10:MEMORY AND MEMORY INTERFACING

SECTION 10.1:SEMICONDUCTOR MEMORY FUNDAMENTALS

Memory capacity

Memory organization

Speed

ROM(read-only memory)

PROM(programmable ROM)or OTP ROM

EPROM(erasable programmable ROM)

EEPROM(electrically erasable programmable ROM)

Flash memory

Mask ROM

RAM(random access memory)

SRAM(static RAM)

Packaging issue in DRAM

DRAM,SRAM and ROM organizations

NV-RAM(nonvolatile RAM)

SECTION 10.2:MEMORY ADDRESS DECODING

Simple logic gate as address decoder

Using the 74LS138 as decoder

SECTION 10.3:IBM PC MEMORY MAP

Conventional memory:640K of RAM

BIOS data area

Video display RAM(VDR)map

ROM address and cold boot on the PC

SECTION 10.4:DATA INTEGRITY IN RAM AND ROM

Checksum byte

Checksum program

Use of parity bit in DRAM error detection

DRAM memory banks

Parity bit generator/checker in the IBM PC

74S280 parity bit generator and checker

SECTION 10.5:16-BIT MEMORY INTERFACING

ODD and EVEN banks

Memory cycle time and inserting wait states

Accessing EVEN and ODD words

Bus bandwidth

SECTION 10.6 ISA BUS MEMORY INTERFACING

Address bus signals

Memory control signals

ISA bus timing for memory

8-bit memory timing for ISA bus

ROM duplicate and x86 PC memory map

Shadow RAW

DIMM and SIMM memory modules

CHAPTER 11:I/O AND THE 8255;ISA BUS INTERFACING

SECTION 11.1:8088 INPUT/OUTPUT INSTRUCTIONS

8-bit data ports

How to use I/O instructions

SECTION 11.2:I/O ADDRESS DECODING AND DESIGN

Using the 74LS373 in an output port design

IN port design using the 74LS244

Memory map I/O

SECTION 11.3:I/O ADDRESS MAP OF X86 PCS

Absolute vs.linear select address decoding

Prototype addresses 300-31FH in the x86 PC

Use of simple logic gates as address decoders

Use of 74LS138 as decoder

IBM PC I/O address decoder

Use of the 8255 in the IBM PC/XT

Port 61H and time delay generation

SECTION 11.4:8255 PPI CHIP

Mode selection of the 8255A

SECTION 11.5:PC INTERFACE TRAINER AND BUS EXTENDER

PC I/O Bus Extender

Buffering 300-31F address range

Installing the PC Bus Extender and booting the PC

Failure to boot

PC Interface Trainer

Design of the PC Trainer

The role of H1 and H2

Connecting the Module Trainer to the PC and testing

Testing the 8255 port

Testing Port A

SECTION 11.6:I/O PROGRAMMING WITH C/C++ AND VB

Visual C/C++ I/O programming

Visual C++ output example

Visual C++ input example

I/O programming in Turbo C/C++

I/O programming in Linux C/C++

Linux C/C++ program with I/O functions

SECTION 11.7:8-BIT AND 16-BIT I/O TIMING IN ISA BUS

8-bit and 16-bit I/O in ISA bus

I/O signals of the ISA bus

8-bit timing and operation in ISA bus

16-bit I/O operation and timing in ISA bus

16-bit data ports instruction

16-bit I/O timing and operation via ISA bus

I/O bus bandwidth for ISA

Interfacing 8-bit peripherals to a 16-bit data bus

CHAPTER 12:INTERFACING TO THE PC:LCD,MOTOR,ADC,AND SENSOR

SECTION 12.1:INTERFACING AN LCD TO THE PC

LCD operation

LCD pin descriptions

Sending commands to LCDs

Sending data to the LCD

Checking LCD busy flag

LCD cursor osition

LCD programming in Visual C/C++

LCD timing and data sheet

SECTION 12.2:INTERFACING A STEPPER MOTOR TO A PC

Stepper motors

Step angle

Stepper motor connection and programming

Steps per second and RPM relation

The four-step sequence and number of teeth on rotor

Motor speed

Holding torque

Wave drive 4-step sequence

SECTION 12.3:INTERFACING DAC TO A PC

Digital-to-analog(DAC)converter

MC1408 DAC(or DAC 808)

Converting IOUT to voltage in 1408 DAC

Generating a sine wave

SECTION 12.4:INTERFACING ADC AND SENSORS TO THE PC

ADC devices

ADC 804 chip

Selecting an input channel

ADC0848 connection to 8255

Interfacing a temperature sensor to a PC

LM34 and LM35 temperature sensors

Signal conditioning and interfacing the LM35 to a PC

CHAPTER 13:8253/54 TIMER AND MUSIC

SECTION 13.1:8253/54 TIMER DESCRIPTION AND INTIALIZATION

Initialization of the 8253/54

Control word

SECTION 13.2:IBM PC 8253/54 TIMER CONNECTIONS AND PROGRAMMING

Using counter 0

Using counter 1

Using counter 2

Use of timer 2 by the speaker

Turning on the speaker via PB0 and PB1 of port 61H

Time delay for 80x86 PCs

Creating time delays in 8088/86-based computers

Time delays in 80x86 IBM PC for 286 and higher processors

SECTION 13.3:GENERATING MUSIC ON THE IBM PC

Playing“Happy Birthday”on the PC

SECTION 13.4:SHAPE of 8253/54 OUTPUTS

OUT0 pulse shape in IBM BIOS

OUT1 pulse shape in IBM BIOS

OUT2 pulse shape in IBM BIOS

8253/54 modes of operation

Testing the 8255/54 timer of the PC Interface Trainer

CHAPTER 14:INTERRUPTS AND THE 8259 CHIP

SECTION 14.1:8088/86 INTERRUPTS

Interrupt service routine(ISR)

Difference between INT and CALL instructions

Categories of interrupts

Hardware interrupts

Software interrupts

Interrupts and the flag register

Processing interrupts

Functions associated with INT 00 to INT 04

SECTION 14.2:IBM PC AND DOS ASSIGNMENT OF INTERRUPTS

Examining the interrupt vector table of your PC

Analyzing an IBM BIOS interrupt service routine

INT 12H:checking the size of RAM on the IBM PC

SECTION 14.3:8259 PROGRAMMABLE INTERRUPT CONTROLLER

8259 control words and ports

Masking and prioritization of IR0-IR7 interrupts

OCW(operation command word)

OCW1(operation command word)

OCW2(operation command word)

Importance of the EOI(end of interrupt)command

OCW3(operation command word)

SECTION 14.4:USE OF THE 8259 CHIP IN THE IBM PC/XT

Interfacing the 8259 to the 8088 in IBM PC/XT computers

Initialization words of the 8259 in the IBM PC/XT

Sequences of hardware interrupts with the 8259

Sources of hardware interrupts in the IBM PC/XT

Sources of NMI in the IBM PC

SECTION 14.5:INTERRUPTS ON 80286 AND HIGHER 80x86 PCs

IBM PC AT hardware interrupts

8259 in master mode

8259 in slave mode

AT-type computers interrupt assignment

Case of missing IRQs on the AT expansion slot

80x86 microprocessor generated interrupts(exceptions)

Intrrupt priority

More about edge-and level-triggered interrupts

Interrupt sharing in the x86 PC

CHAPTER 15:DIRECT MEMORY ACCESSING;THE 8237 DMA CHIP

SECTION 15.1:CONCEPT OF DMA

SECTION 15.2:8237 DMA CHIP PROGRAMMING

8237's internal control registers

Command register

Status register

Mode register

Single mask register

All mask register

Master clear/temporary/register

Clear mask register

SECTION 15.3:8237 DMA INTERFACING IN THE IBM PC/XT

8237 and 8088 connections in the IBM PC

Channel assignment of the 8237 in the IBM PC/XT

DMA page register

DMA data transfer rate of the PC/XT

SECTION 15.4:REFRESHING DRAM USING CHANNEL 0 OF THE 8237

Refreshing DRAM with the 8237

Refreshing in the IBM PC/XT

DMA cycle of channel 0

SECTION 15.5:DMA IN 80x86-BASED C AT-TYPE COMPUTERS

8237 DMA #1

8237 DMA #2

Points to be noted regarding 16-bit DMA channels

DMA channel priority

I/O cycle recovery time

DMA transfer rate

CHAPTER 16:VIDEO AND VIDEO ADAPTERS

SECTION 16.1:PRINCIPLES OF MONITORS AND VIDEO ADAPTERS

How to judge a monitor

Dot pitch

Dot pitch and monitor size

Phosphorous materials

Color monitors

Analog and digital monitors

Video display RAM and video controller

Character box

SECTION 16.2:VIDEO ADAPTERS AND TEXT MODE PROGRAMMING

CGA(color graphics adapter)

Video RAM in CGA

Attribute byte in CGA text mode

MDA(monochrome display adapter)

Video RAM in MDA

Attribute byte in IBM MDA

EGA(enhanced graphics adapter)

EGA video memory and attribute

MCGA(multicolor graphics array)

VGA(video graphics array)

Video memory and attributes in VGA

Super VGA(SVGA) and other video adapters

SECTION 16.3:TEXT MODE PROGRAMMING USING INT 10H

Finding the current video mode

Changing the video mode

Setting the cursor position(AH=02)

Getting the current cursor position(AH=03)

Scrolling the window up to clear the screen(AH=06)

Writing a character in teletype mode(AH=0E)

Writing a string in teletype mode(AH=13H)

Character generator ROM

How characters are displayed in text mode

Character definition table in VGA

Changing the cursor shape using INT 10H

SECTION 16.4:GRAPHICS AND GRAPHICS PROGRAMMING

Graphics:pixel resolution,color,and video memory

The case of CGA

The case of EGA

Video memory size and color relation for EGA

The case of VGA

Video memory size and color relation for VGA

The case of SVGA graphics

INT 10H and pixel programming

Drawing horizontal or vertical lines in graphics mode

CHAPTER 17:SERIAL DATA COMMUNICATION AND THE 16450/8250/51 CHIPS

SECTION 17.1:BASICS OF SERIAL COMMUNICATION

Half-and full-duplex transmission

Asynchronous serial communication and data framing

Start and stop bits

Data transfer rate

RS232 and other serial I/O standards

RS232 pins

Other serial I/O interface standards

Data communication classification

Examining the RS232 handshaking signals

SECTION 17.2:ACCESSING IBM PC COM PORTS USING DOS AND BIOS

IBM PC COM ports

Using the DOS MODE command

Data COM programming using BIOS INT 14H

SECTION 17.3:INTERFACING THE NS8250/16450 UART IN THE IBM PC

8250 pin descriptions

The 8250 registers

Limitation of the 8250/16450 UART and 16550

SECTION 17.4:INTEL 8251 USART AND SYNCHRONOUS COMMUNICATION

Intel's 8251 USART chip

Synchronous serial data communication

SDLC(serial data link control)

Cyclic redundancy checks

CHAPTER 18:KEYBOARD AND PRINTER INTERFACING

SECTION 18.1:INTERFACING THE DEYBOARD TO THE CPU

Scanning and identifying the key

Grounding rows and reading the columns

SECTION 18.2:PC KEYBOARD INTERFACING AND PROGRAMMING

Make and break

IBM PC scan codes

BIOS INT 16H keyboard programming

Hardware INT 09 role in the IBM PC keyboard

Keyboard overrun

Keyboard buffer in BIOS data area

BIOS keyboard buffer

Tail pointer

Head pointer

PC keyboard technology

SECTION 18.3:PRINTER AND PRINTER INTERFACING IN THE IBM PC

Centronics printer interface pins

Data lines and grounds

Printer status signals

Printer control signals

IBM PC printer interfacing

Programming the IBM PC printer with BIOS INT 17H

What is printer time-out?

ASCII control characters

Inner working of BIOS INT 17H for printing a character

SECTION 18.4:BIDIRECTIONAL DATA BUS IN PARALLEL PORTS

SPP

PS/2

How to detect a PS/2-type bidirectional data bus

EPP

ECP

Using an LPT port for output

LCD connection to the parallel port

Stepper motor connection to the parallel port

Data input buffering

BIOS dta area and LPT I/O address

CHAPTER 19:FLOPPY DISKS,HARD DISKS,AND FILES

SECTION 19.1:FLOPPY DISK ORGANIZATION

Capacity of the floppy disk

Formatting disks

Disk organization

Looking into the boot record

Directory

Bootable and nonbootable disks

FAT(file allocation table)

How to calculate sector locations of the FAT and the directory

SECTION 19.2:HARD DISKS

Hard dish capacity and organizaation

Partitioning

Hard disk layout

Hard disk boot record

hard disk FAT

Clusters

Hard disk directory

Speed of the hard disk

Data encoding techniques in the hard disk

Interfacing standard in the hard disk

Interleaving

Low-and high-level formatting

Parking the head

Disk caching

Disk reliability

SECTION 19.3:DISK FILE PROGRAMMING

File handle and error code

CHAPTER 20:THE 80x87 MATH COPROCESSOR

SECTION 20.1:MATH COPROCESSOR AND IEEE FLOATIONGPOINT STANDARDS

IEEE floating point standard

IEEE single-precision floating-point numbers

IEEE double-precision floating-point numbers

Other data formats of the 8087

SECTION 20.2:80x87 INSTRUCTIONS AND PROGRAMMING

Assembling and running 80x87 programs on the IBM PC

Verifying the Solution for Examples 20-1 to 20-4

80x87 registers

Trig functions

Integer numbers

SECTION 20.3:8087 HARDWARE CONNECTIONS IN THE IBM PC/XT

8087 and 8088 connection in the IBM PC/XT

How the 8088 and 8087 work together in the IBM PC/XT

SECTION 20.4:80x87 INSTRUCTIONS AND TIMING

Real transfers

Integer transfers

Packed decimal transfers

Addition

Subtraction

Reversed subtraction

Multiplication

Division

Reversed division

Ohter arithmetic instructions

Compare instructions

Transcendental instructions

Constant instructions

Processor control instructions

CHAPTER 21:386 MICROPROCESSOR:REAL vs.PROTECTED MODE

SECTION 21.1:80386 IN REAL MODE

What happened to the 80186/188?

80186/88 instructions

80286 Microprocessor

Major changes in the 80386

80386 Real mode programming

32-bit registers

Which end goes first?

General registers as pointers

Scaled index addressing mode

Some new 386 instructions

MOVSX and MOVZX instructions

Bit scan instructions

SECTION 21.2:80386:A HARDWARE VIEW

Overview of pin functions of the 80386

Bus bandwidth in the 386

Data misalignment in the 386

I/O address space in the 386

SECTION 21.3:80386 PROTECTED MODE

Protection mechanism in the 386

Virtual memory

Segmentation and descriptor table

Local and global descriptor tables

64 Terabtyes of virtual memory

Paging

Going from a linear address to a physical address

The bigger the TLB,the better

Virtual 8086 mode

CHAPTER 22:HIGH-SPEED MEMORY INTERFACING AND CACHE

SECTION 22.1:MEMORY CYCLE TIME OF THE 80X86

Introducing wait states into the memory cycle

SECTION 22.2:PAGE,STATIC COLUMN,AND NIBBLE MODE DRAMS

Memory access time vs.memory cycle time

types of DRAM

DRAM(standard mode)

DRAM interfacing using the interleaving method

Interleaved drawback

Page mode DRAM

Static column mode

Nibble mode

Timing comparison of DRAM modes

SECTION 22.3:CACHE MEMORY

Cache organization

Fully associative cache

Direct-mpped cache

Set associative

Updating main memory

Write-through

Write-back(copy-back)

Cache coherency

Cache replacement policy

Cache fill block size

SECTION 22.4:EDO,SDRAM,AND RAMBUS MEMORIES

EDO DRAM:origin and operation

SDRAM(synchronous DRAM)

Synchronous DRAM and burst mode

SDRAM and interleaving

Rambus DRAM

Overview of Rambus technology

Rambus protocol for block transfer

CHAPTER 23:486,PENTIUM,PENTIUM PRO AND MMX

SECTION 23.1:THE 80486 MICROPROCESSOR

Enhancements of the 486

CLK in the 80486

High memory area(HMA)and the 80486

386,486 Performance comparison

More about pipelining

SECTION 23.2:INTEL'S PENTIUM

Features of the Pentium

Intel's overdrive technology

SECTION 23.3:RISC ARCHITECTURE

Features of RISE

Comparison of sample program for RISC and CISC

IBM/Motorola RISC

SECTION 23.4:PENTIUM PRO PROCESSOR

Pentium Pro:internal architecture

Pentium Pro is both superpiplined and superscalar

What is out-of-order execution?

Branch prediction

Bus frequency vs.internal frequency in Pentium Pro

SECTION 23.5:MMX TECHNOLOGY

DSP and multimedia

Register aliasing by MMX

Data types in MMX

SECTION 23.6:PROCESSOR IDENTIFICATION IN INTEL X86

Program to identify the CPU

CPUID instruction and MMX technology

CHAPTER 24:MS DOS STRUCTURE,TSR,AND DEVICE DRIVERS

SECTION 24.1:MS DOS STRUCTURE

DOS genealogy

From cold boot to DOS prompt

DOS standard device names

More about CONFIG.SYS and how it is used

What is AUTOEXEC.BAT and how is it used?

Types of DOS commands

SECTION 24.2:TSR AND DEVICE DRIVERS

Executing but not abandoning the program

How to make a program resident

Invoking the TSR

Hooking into hardware interrupts

Replacing the CS:IP values in the interrupt vector table

Writing a simple TSR

TSR with hot keys

Hooking into timer clock INT 08

DOS is not reentrant

Device drivers

Device driver categories

CHAPTER 25:MS DOS MEMORY MANAGEMENT

SECTION 25.1:80x86 PC MEMORY TERMINOLOGY AND CONCEPTS

Conventional memory

Upper memory area

IBM standard using ROM space in the upper memory area

Expanded memory

Extended memory

High memory area(HMA)

Shadow RAM

DOS MEM command

SECTION 25.2:DOS MEMORY MANAGEMENT AND LOADING HIGH

Loading high into HMA

Finding holes in the upper memory area

EMM386.EXE options and switches

Loading high TSR and device driver into upper memory area

Emulating expanded memory and using UMB in 386/486/Pentium PC

How expanded memory is accessed

CHAPTER 26:IC TECHNOLOGY AND SYSTEM DESIGN CONSIDERATIONS

SECTION 26.1:OVERVIEW OF IC TECHNOLOGY

MOS vs.bipolar transistors

Overview of logic families

The case of inverters

CMOS inverter

Input,output characteristics of some logic families

History of logic families

Recent advances in logic families

Evolution of IC technology in Intel's 80x86 microprocessors

SECTION 26.2:IC INTERFACING AND SYSTEM DESIGN CONSIDERATIONS

IC fan-out

Capacitance derating

Power dissipation considerations

Dynamic and Static currents

Power-down option and Intel's SL series

Ground bounce

Filtering the transient currents using decoupling capacitors

Bulk decoupling capacitor

Crosstalk

Transmission line ringing

SECTION 26.3:DATA INTEGRITY AND ERROR DETECTION IN DRAM

Soft error and hard error

Mean time between failure(MTBF)and FIT for DRAM

Error detection and correction

ECL and gallium arsenide(GaAs)chips

CHAPTER 27:ISA,EISA,MCA,LOCAL,AND PCI BUS

SECTION 27.1:ISA,EISA,AND IBM MICRO CHANNEL

Master and slave

Bus arbitration

Bus protocol

Bus bandwidth

ISA buses

36-pin part of the ISA bus

Limitations of the ISA bus

IBM Micro Channel Architecture(MCA)

Major characteristics of MCA

EISA bus

EISA slot numbering

Bus performance comparison

SECTION 27.2:VL BUS AND PCI LOCAL BUSES

Definition and merits of local bus

VL bus(VESA local bus)characteristics

PCI local bus

PCI local bus characteristics

Plug and play feature

PCI connector

PCI performance

CHAPTER 28:PROGRAMMING DOS,BIOS,HARDWARE WITH C/C++

SECTION 28.1:BIOS&DOS INTERRUPT PROGRAMMING WITH C

Programming BIOS interupts with C/C++

Finding the conventional memory size with INT 12H

INT 16H and keyboard access

Programming INT 21H DOS function calls with C/C++

Accessing segment registers

Accessing the Carry flag in int86 and intdos functions

SECTION 28.2:PROGRAMMING PC HARDWARE WITH C/C++

Accessing 80x86 SEGMENT:OFFSET memory addresses

Accessing BIOS data area with C

Programming input/output ports with C/C++

Revisiting playing music

Accessing parallel printer's(LPT1)data bus with C

Finding memory aboove IBM:the extended memory size

Programming the CMOS RAM real-time clock(RTC)

Accessing the CMOS RAM bytes

Programming CMOS RAM with C/C++

APPENDIX A:DEBUG PROGRAMMING

APPENDIX B:80x86 INSTRUCTIONS AND TIMING

APPENDIX C:ASSEMBLER DIRECTIVES AND NAMING RULES

APPENDIX D:DOS INTERRUPT 21H AND 33H LISTING

APPENDIX E:BIOS INTERRUPTS

APPENDIX F:ASCII CODES

APPENDIX G:I/O ADDRESS MAPS

APPENDIX H:IBM PC/PS BIOS DATA AREA

APPENDIX I:DATA SHEETS

REFERENCES

INDEX